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Word figurative mark: “TraciT TECHNOLOGIES“ Euipotm15 Jun 2014 European Union Intellectual Property Office (Trade Marks)
History
Text
Trade mark
| Type | Figurative |
| Name | TraciT TECHNOLOGIES |
| Graphic representation |  |
| Colour | Blue (red 51, green 51, blue 153) and grey (red 128, green 128, blue 128). |
| Filing number | 003314507 |
| Trade mark status | REGISTRATION_EXPIRED |
| Nice Classification |
9: Magnetic, optical, digital, electronic data carriers, silicon wafers; Semiconducters; silicon wafers and semiconductors for printed circuits and integrated circuits, and activities derived therefrom; components for microelectronics and micromechanics; material substrates for microelectronics and micromechanics, flat screens, integrated optical guides, sensors, smartcards or cards with microprocessors, magnetic identification cards; microelectronic circuits, microsystems; semiconductor wafers assembled in particular by glueing or molecular bonding; electronic and microelectronic circuits or microsystems transferred onto carriers of all kinds, in particular onto silicon substrates or substrates of silica, or onto flexible substrates; silicon chips with a buried layer of silica, semiconductor chips with buried insulator or oxide layers; substrates of silicon or of materials for microelectronics, micromechanics, and activities derived therefrom. 40: Treatment of materials, namely micro-machining, transfer of microelectronic circuits or microsystems onto carriers of all kinds, mechanical, chemical and physical treatment and machining of material surfaces; processing of substrates of materials for microelectronics, and all activities derived therefrom; treatment of silicon wafers and semiconductors; magnetization; polishing of silicon wafers and semiconductors, transfer of silicon layers, semiconductors and components onto all media; assembly of semiconductor chips, in particular with an insulator or oxide layer between the chips, treatment of materials, in particular semiconductors, by means of molecular assembly or glueing, treatment of materials by mechanical or mechano-chemical polishing. 42: Evaluation, appraisal, research and reports in the scientific and technological fields; research and development (for others); research and development, in particular in the field of silicon wafers and semiconductors for integrated circuits, and activities derived therefrom; research and development, in particular in the field of the transfer of microelectronic circuits or microsystems onto carriers of all kinds and activities derived therefrom; engineering, in particular in the field of silicon wafers and semiconductors for integrated circuits, and activities derived therefrom, and the transfer of microelectronic circuits or microsystems onto carriers of all kinds and activities derived therefrom; research and development, engineering in the field of the assembly of semiconductor chips, in particular with an intermediate insulator or oxide layer, and molecular adhesion. |
| Filing date | 14/08/2003 |
| Registration date | 31/03/2005 |
| Expiry date | 14/08/2013 |
| Owners |
SOITEC Parc Technologique des Fontaines, Chemin des Franques F-38190 BERNIN France |
The filing refers to a past date, and does not necessarily reflect the current state. The current state is available on the following page: Soitec SA, Bernin, France.
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